Logitech Revue Technical - Revision history

Zenofex at 10:48, 31 December 2014

2014-12-31T10:48:37Z

← Older revision		Revision as of 10:48, 31 December 2014
Line 54:		Line 54:
	== NDK Support ==		== NDK Support ==

	Although at present Google has not released a proper NDK for the platform, the ~~gtvhacker~~ team have combined the Intel SDK Toolchain from the [http://code.google.com/p/googletv-mirrored-source/ Google TV Mirrored Source site] with the work of the [http://www.android-x86.org/ Android x86] project to provide unofficial support in the interim.		Although at present Google has not released a proper NDK for the platform, the Exploitee.rs team have combined the Intel SDK Toolchain from the [http://code.google.com/p/googletv-mirrored-source/ Google TV Mirrored Source site] with the work of the [http://www.android-x86.org/ Android x86] project to provide unofficial support in the interim.

	The entire process of setting up unofficial NDK support has been simplified into an [http://dl.dropbox.com/u/1886948/gtvhacker-NDK-installer.zip easy to use script] by craigdroid. The script has been tested on a few of our systems running CentOS 5.4 32-bit, as well as 32-bit and 64-bit editions of Ubuntu.		The entire process of setting up unofficial NDK support has been simplified into an [http://dl.dropbox.com/u/1886948/gtvhacker-NDK-installer.zip easy to use script] by craigdroid. The script has been tested on a few of our systems running CentOS 5.4 32-bit, as well as 32-bit and 64-bit editions of Ubuntu.
Line 157:		Line 157:
	*XDP1 --> Intel XDP Debug Adapter [http://software.intel.com/sites/products/documentation/hpc/atom/application/device_driver_debugging.pdf Information on XDP Debugging] [ftp://download.intel.com/design/Pentium4/guides/31337301.pdf Page 23 Pinout]		*XDP1 --> Intel XDP Debug Adapter [http://software.intel.com/sites/products/documentation/hpc/atom/application/device_driver_debugging.pdf Information on XDP Debugging] [ftp://download.intel.com/design/Pentium4/guides/31337301.pdf Page 23 Pinout]

	*Samsung K9F8G08U0M Alternative [http://~~gtvhacker~~.~~com~~/index.php/File:Revue-NAND-Alt.jpg Pin-out]		*Samsung K9F8G08U0M Alternative [http://Exploitee.rs/index.php/File:Revue-NAND-Alt.jpg Pin-out]

	== Volume Management Configuration ==		== Volume Management Configuration ==

Zenofex: /* Firmware Links */

2012-06-08T23:37:03Z

Firmware Links

← Older revision		Revision as of 23:37, 8 June 2012
Line 22:		Line 22:
	*http://android.clients.google.com/packages/ota/logitech_ka/4d9b9425b17f.mp-signed-ota_update-b49116.zip		*http://android.clients.google.com/packages/ota/logitech_ka/4d9b9425b17f.mp-signed-ota_update-b49116.zip
	*http://android.clients.google.com/packages/ota/logitech_ka/f008beb34df8.mp-signed-ota_update-b51795.zip		*http://android.clients.google.com/packages/ota/logitech_ka/f008beb34df8.mp-signed-ota_update-b51795.zip
			*http://android.clients.google.com/packages/ota/logitech_ka/0454e41c9583.mp-signed-ota_update-b65871_relapks.zip

	== Kernel Revisions ==		== Kernel Revisions ==

Zenofex: /* Available Pinouts */

2012-01-29T09:53:20Z

Available Pinouts

← Older revision		Revision as of 09:53, 29 January 2012
Line 155:		Line 155:
	*SW2 --> Sync Push Button Switch (Facing button, left = GND, right = GPIO somewhere?)		*SW2 --> Sync Push Button Switch (Facing button, left = GND, right = GPIO somewhere?)
	*XDP1 --> Intel XDP Debug Adapter [http://software.intel.com/sites/products/documentation/hpc/atom/application/device_driver_debugging.pdf Information on XDP Debugging] [ftp://download.intel.com/design/Pentium4/guides/31337301.pdf Page 23 Pinout]		*XDP1 --> Intel XDP Debug Adapter [http://software.intel.com/sites/products/documentation/hpc/atom/application/device_driver_debugging.pdf Information on XDP Debugging] [ftp://download.intel.com/design/Pentium4/guides/31337301.pdf Page 23 Pinout]

			*Samsung K9F8G08U0M Alternative [http://gtvhacker.com/index.php/File:Revue-NAND-Alt.jpg Pin-out]

	== Volume Management Configuration ==		== Volume Management Configuration ==

Bostwickenator: /* NDK Support */

2011-12-18T10:00:49Z

NDK Support

← Older revision		Revision as of 10:00, 18 December 2011
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	wget http://dl.dropbox.com/u/1886948/gtvhacker-NDK-installer.zip && unzip gtvhacker-NDK-installer.zip && ./gtvhacker-NDK-installer.sh		wget http://dl.dropbox.com/u/1886948/gtvhacker-NDK-installer.zip && unzip gtvhacker-NDK-installer.zip && ./gtvhacker-NDK-installer.sh
	</pre>		</pre>

			'''Update''' This script no longer works as is please edit the line

			wget -O ~/googletv/sdk/intel-sdk-toolchain.tar.bz2 http://googletv-mirrored-source.googlecode.com/hg/intel-sdk/intel-sdk-toolchain.tar.bz2?r=27705a482273e3a34e8bcdbfb4fdad9afcd65e93

			to

			wget -O ~/googletv/sdk/intel-sdk-toolchain.tar.bz2 http://v1.googletv-mirrored-source.googlecode.com/hg-history/v1/intel-sdk/intel-sdk-toolchain.tar.bz2

	This will install the NDK to ~/googletv/ndk/ for the current user. Some guidance on how to use the NDK is provided upon completion of successful script execution.		This will install the NDK to ~/googletv/ndk/ for the current user. Some guidance on how to use the NDK is provided upon completion of successful script execution.

ASmig: /* I2C Busses */

2011-12-05T09:47:22Z

I2C Busses

← Older revision		Revision as of 09:47, 5 December 2011
Line 180:		Line 180:
	Brief register description in /etc/platform_config/ce4100/platform_config.hcfg line 73		Brief register description in /etc/platform_config/ce4100/platform_config.hcfg line 73

	=== IDT ICS9LPRS525AGLF (CK505) & ~~Intel CE4150 (Atom)~~ ===		=== IDT ICS9LPRS525AGLF (CK505) & Silicon Image Sil9135 [http://www.ti.com/general/docs/lit/getliterature.tsp?baseLiteratureNumber=SPRUER0&track=no TI I2C Datasheet] ===
	Found devices at:		Found devices at:
	0x60(0x30 W) 0x61(0x30 R) 0x68(0x34 W) 0x69(0x34 R) 0xD2(0x69 W) 0xD3(0x69 R)		0x60(0x30 W) 0x61(0x30 R) 0x68(0x34 W) 0x69(0x34 R) 0xD2(0x69 W) 0xD3(0x69 R)

ASmig: /* IDT ICS9LPRS525AGLF (CK505) & Intel CE4150 (Atom) */

2011-12-05T09:26:36Z

IDT ICS9LPRS525AGLF (CK505) & Intel CE4150 (Atom)

← Older revision		Revision as of 09:26, 5 December 2011
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	0x60(0x30 W) 0x61(0x30 R) 0x68(0x34 W) 0x69(0x34 R) 0xD2(0x69 W) 0xD3(0x69 R)		0x60(0x30 W) 0x61(0x30 R) 0x68(0x34 W) 0x69(0x34 R) 0xD2(0x69 W) 0xD3(0x69 R)

	0x30 read:		0x30 - The following 256 byte read comes from 0x61 after writing a single data byte (0x00) to 0x60. The Bus Pirate command is [0x60,0x00[0x61,r:256] with output reformatted here:
	<pre>		<pre>
	0000000: 0100 3591 0400 0000 0480 3400 0000 0000 ..5.......4.....		0000000: 0100 3591 0400 0000 0480 3400 0000 0000 ..5.......4.....
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	</pre>		</pre>

	0x34 read:		0x34 - The following 256 byte read comes from 0x69 after writing a single data byte (0x00) to 0x68. The Bus Pirate command is [0x68,0x00[0x69,r:256] with output reformatted here:
	<pre>		<pre>
	0000000: 0000 5200 0000 000c 0000 0000 683c 0100 ..R.........h<..		0000000: 0000 5200 0000 000c 0000 0000 683c 0100 ..R.........h<..
Line 224:		Line 224:
	</pre>		</pre>

	0x69 (CK505)		0x69 (CK505) initialization on boot looks something like:
			<pre>
			[0xD2+0x02+][0xD3+0x1A+][0xD2+0x02+0x05][0xD2+0x00+0x01+]
			</pre>

			Later in boot, some jumbled traffic is observed, but the target seen here does not ACK scans or explicit requests matching the sniffed traffic.
			<pre>
			[0xA0+0x00-0xA1+0x00-0xFD-0xFB-0xF7-0xEF-0xDF-0x80+0x35-[0x5A+0xA4+0x00+0x00+0x00+0x00+0x00+0x85+0x00-[0x03+]
			</pre>

	=== Microchip PIC24FJ64GA004 ===		=== Microchip PIC24FJ64GA004 ===

ASmig: /* I2C Busses */ rough draft

2011-12-05T08:32:15Z

I2C Busses: rough draft

@@ Line 166: / Line 166: @@
 == I2C Busses ==
 [[Category:Logitech Revue]]
 [[Category:Logitech Revue|Technical]]

ASmig: New section for I2C stuff

2011-12-05T07:54:03Z

New section for I2C stuff

← Older revision		Revision as of 07:54, 5 December 2011
Line 147:		Line 147:
	*SW2 --> Sync Push Button Switch (Facing button, left = GND, right = GPIO somewhere?)		*SW2 --> Sync Push Button Switch (Facing button, left = GND, right = GPIO somewhere?)
	*XDP1 --> Intel XDP Debug Adapter [http://software.intel.com/sites/products/documentation/hpc/atom/application/device_driver_debugging.pdf Information on XDP Debugging] [ftp://download.intel.com/design/Pentium4/guides/31337301.pdf Page 23 Pinout]		*XDP1 --> Intel XDP Debug Adapter [http://software.intel.com/sites/products/documentation/hpc/atom/application/device_driver_debugging.pdf Information on XDP Debugging] [ftp://download.intel.com/design/Pentium4/guides/31337301.pdf Page 23 Pinout]
	~~[[Category:Logitech Revue]]~~

	== Volume Management Configuration ==		== Volume Management Configuration ==
Line 165:		Line 164:

	Note the interesting comment about the media_path as well as the read_only=true attribute.		Note the interesting comment about the media_path as well as the read_only=true attribute.

			== I2C Busses ==


			[[Category:Logitech Revue]]
	[[Category:Logitech Revue\|Technical]]		[[Category:Logitech Revue\|Technical]]

ASmig: /* Available Pinouts */ A little sorting and some additions

2011-12-05T05:59:49Z

Available Pinouts: A little sorting and some additions

← Older revision		Revision as of 05:59, 5 December 2011
Line 133:		Line 133:

	== Available Pinouts ==		== Available Pinouts ==
	*UART1 --> [http://i.imgur.com/xJHay.jpg UART Pinout]		*UART1 --> Console (Bottom left = +3v3, Bottom right = interface TX, Top left = interface RX, Top right = GND) [http://i.imgur.com/xJHay.jpg UART Pinout]
	*J3 --> PIC Chip Access (Pin 1 = VPP/MCLR, Pin 2 = VDD, Pin 3 = VSS, Pin 4 = ICSPDAT/PGD, Pin 5 = ICSPCLK/PGC, Pin 6 = Auxiliary)		*J3 --> PIC Chip Access (Pin 1 = VPP/MCLR, Pin 2 = VDD, Pin 3 = VSS, Pin 4 = ICSPDAT/PGD, Pin 5 = ICSPCLK/PGC, Pin 6 = Auxiliary)
	*~~SW1~~ --> ~~Push Button Switch~~ (~~Use is unknown~~)		*J4 --> Fan (Pin 1 = GND, Pin 2 = VCC +5v, Pins 3-4 = Sense/Control)
	*J20 --> I2C (Top left - GND Top right - ? Bottom left - SDA Bottom right - SCL), I2C lines are also on XDP1 reachable, lines are without pullups and no activity is visible		*J13 --> Unknown (Power for SATA?) - (Pin 1 = ?, Pin 2 = GND, Pin 3 = GND, Pin 4 = 5v)
	*J69 --> USB Pinout		*J20 --> I2C (Top left = GND, Top right = ?, Bottom left = SDA, Bottom right = SCL), I2C lines are also on XDP1 reachable, lines are without pullups and no activity is visible
	*SATA1 --> SATA Pinout (Pin 1 = GND, Pin 2 = TXP / A+ , Pin 3 = TXN / A-, Pin 4 = GND , Pin 5 = RXN / B-, Pin 6 = RXP / B+ , Pin 7 = GND)
	*J24 --> Unknown (Pin 1 = 3.3, Pin 2 = ?, Pin 3 = ?, Pin 4 = GND)		*J24 --> Unknown (Pin 1 = 3.3, Pin 2 = ?, Pin 3 = ?, Pin 4 = GND)
	*~~J13~~ --> ~~Unknown~~ (~~Power for SATA?)~~ - (~~Pin 1~~ = ?, ~~Pin 2~~ = GND, ~~Pin 3~~ = ~~GND~~, ~~Pin 4~~ = 5v)		*J66 --> (Pin1 = +3V3, Pin2 = IR-reciever to PIC PIN41, Pin3 = GND, Pin4 = D7 LED(green) to PIC PIN2, Pin6 = GND, Pin7 = D8 LED(green) to PIC PIN38, Pin8 = GND, Pin9 = IR-leds to PIC PIN37, Pin10 = 12V) Numbered from bottom left
	*J67 --> USB (Pin 1 = GND, Pin 2 = D-, Pin 3 = D+, Pin 4 = FREE, Pin 5 = VCC +5V) used for RF daughter board. [http://www.chrispix.com/googleTV.jpg IMG]		*J67 --> USB (Pin 1 = GND, Pin 2 = D-, Pin 3 = D+, Pin 4 = FREE, Pin 5 = VCC +5V) used for RF daughter board. [http://www.chrispix.com/googleTV.jpg IMG]
			*J68 --> USB (Pin 1 = VCC +5v, Pin 4 = GND, Pin 5 = NC) to WiFi module
			*J69 --> USB Pinout like J67
			*SATA1 --> SATA Pinout (Pin 1 = GND, Pin 2 = TXP / A+ , Pin 3 = TXN / A-, Pin 4 = GND , Pin 5 = RXN / B-, Pin 6 = RXP / B+ , Pin 7 = GND)
			*SW1 --> Unknown Push Button Switch (Facing button, left = GND, right = ?)
			*SW2 --> Sync Push Button Switch (Facing button, left = GND, right = GPIO somewhere?)
	*XDP1 --> Intel XDP Debug Adapter [http://software.intel.com/sites/products/documentation/hpc/atom/application/device_driver_debugging.pdf Information on XDP Debugging] [ftp://download.intel.com/design/Pentium4/guides/31337301.pdf Page 23 Pinout]		*XDP1 --> Intel XDP Debug Adapter [http://software.intel.com/sites/products/documentation/hpc/atom/application/device_driver_debugging.pdf Information on XDP Debugging] [ftp://download.intel.com/design/Pentium4/guides/31337301.pdf Page 23 Pinout]
	*J66 --> (Pin1 = +3V3, Pin2 = IR-reciever to PIC PIN41, Pin3 = GND, Pin4 = D7 LED(green) to PIC PIN2, Pin6 = GND, Pin7 = D8 LED(green) to PIC PIN38, Pin8 = GND, Pin9 = IR-leds to PIC PIN37, Pin10 = 12V) Numbered from bottom left
	[[Category:Logitech Revue]]		[[Category:Logitech Revue]]

Pcgeil: /* Available Pinouts */

2011-08-31T21:57:07Z

Available Pinouts

← Older revision		Revision as of 21:57, 31 August 2011
Line 136:		Line 136:
	*J3 --> PIC Chip Access (Pin 1 = VPP/MCLR, Pin 2 = VDD, Pin 3 = VSS, Pin 4 = ICSPDAT/PGD, Pin 5 = ICSPCLK/PGC, Pin 6 = Auxiliary)		*J3 --> PIC Chip Access (Pin 1 = VPP/MCLR, Pin 2 = VDD, Pin 3 = VSS, Pin 4 = ICSPDAT/PGD, Pin 5 = ICSPCLK/PGC, Pin 6 = Auxiliary)
	*SW1 --> Push Button Switch (Use is unknown)		*SW1 --> Push Button Switch (Use is unknown)
	*J20 --> I2C (Top left - GND Top right - ? Bottom left - SDA Bottom right - SCL)		*J20 --> I2C (Top left - GND Top right - ? Bottom left - SDA Bottom right - SCL), I2C lines are also on XDP1 reachable, lines are without pullups and no activity is visible
	*J69 --> USB Pinout		*J69 --> USB Pinout
	*SATA1 --> SATA Pinout (Pin 1 = GND, Pin 2 = TXP / A+ , Pin 3 = TXN / A-, Pin 4 = GND , Pin 5 = RXN / B-, Pin 6 = RXP / B+ , Pin 7 = GND)		*SATA1 --> SATA Pinout (Pin 1 = GND, Pin 2 = TXP / A+ , Pin 3 = TXN / A-, Pin 4 = GND , Pin 5 = RXN / B-, Pin 6 = RXP / B+ , Pin 7 = GND)